L4971
1.5A STEP DOWN SWITCHING REGULATOR
1 FEATURES
Figure 1. Package
UP TO 1.5A STEP DOWN CONVERTER
OPERATING INPUT VOLTAGE FROM 8V TO
55V
PRECISE 3.3V (1%) INTERNAL
DIP8
SO16W
REFERENCE VOLTAGE
OUTPUT VOLTAGE ADJUSTABLE FROM
Table 1. Order Codes
3.3V TO 50V
Part Number Package
SWITCHING FREQUENCY ADJUSTABLE UP
TO 300KHz L4971 DIP8
VOLTAGE FEEDFORWARD
L4971D SO16W
ZERO LOAD CURRENT OPERATION
L4971D013TR SO16 in Tape & Reel
INTERNAL CURRENT LIMITING (PULSE-
BYPULSE AND HICCUP MODE)
A switching frequency up to 300KHz is achievable
INHIBIT FOR ZERO CURRENT
(the maximum power dissipation of the packages
CONSUMPTION
must be observed).
PROTECTION AGAINST FEEDBACK
DISCONNECTION
A wide input voltage range between 8V to 55V and
THERMAL SHUTDOWN output voltages regulated from 3.3V to 50V cover
the majority of todays applications.
SOFT START FUNCTION
Features of this new generations of DC-DC con-
verter include pulse-by-pulse current limit, hiccup
2 DESCRIPTION
mode for short circuit protection, voltage feedfor-
The L4971 is a step down monolithic power
ward regulation, soft-start, protection against feed-
switching regulator delivering 1.5A at a voltage be-
back loop disconnection, inhibit for zero current
tween 3.3V and 50V (selected by a simple external
consumption and thermal shutdown.
divider). Realized in BCD mixed technology, the
The device is available in plastic dual in line, DIP8
device uses an internal power D-MOS transistor
for standard assembly, and SO16W for SMD as-
(with a typical Rdson of 0.25) to obtain very high
sembly.
efficency and high switching speed.
Figure 1. Block Diagram
Vi=8V to 55V
5
8
R
1
20K
L4971
3
4
C C C
1 7 2
L1
7 1 6
2 V =3.3V/1.5A
220F 220nF 2.7nF O
126H
63V
(77120)
C
6
R D1
2 100nF
C
8
9.1K STPS
C
5 330F
3L60U
100nF
C
4
22nF
D97IN748A
Rev. 11
May 2005 1/13L4971
Figure 2. Block Diagram
VCC
5
THERMAL VOLTAGES
SHUTDOWN MONITOR
CBOOT
CHARGE
2
INTERNAL INTERNAL
SS_INH INHIBIT SOFTSTART
REFERENCE SUPPLY
5.1V
3.3V
7
COMP 6
BOOT
8 E/A
FB PWM
R
Q
CBOOT
3.3V S
CHARGE
AT LIGHT
DRIVE
LOADS
OSCILLATOR
3 1 4
OSC GND OUT D97IN594
Figure 3. Pin Connections
N.C. 1 16 N.C.
GND 2 15 N.C.
SS_INH 3 14 FB
GND 1 8 FB
OSC 4 13 COMP
SS_INH 2 7 COMP
OUT 5 12 BOOT
OSC 3 6 BOOT
OUT 6 11 VCC
OUT 4 5 VCC
N.C. 7 10 N.C.
D97IN595
N.C. 8 9 N.C.
D97IN596
DIP8
SO16
Table 2. Pin Description
DIP SO (*) Name Function
1 2 GND Ground
2 3 SS_INH A logic signal (active low) disables the device (sleep mode operation).
A capacitor connected between this pin and ground determines the soft start time.
When this pin is grounded disabled the device (driven by open collector/drain).
3 4 OSC An external resistor connected between the unregulated input voltage and this pin and
a capacitor connected from this pin to ground fix the switching frequency. (Line feed
forward is automatically obtained)
4 5, 6 OUT Stepdown regulator output
511 Unregulated DC input voltage
VCC
6 12 BOOT A capacitor connected between this pin and OUT allows to drive the internal DMOS
Transistor
7 13 COMP E/A output to be used for frequency compensation
8 14 FB Stepdown feedback input. Connecting directly to this pin results in an output voltage of
3.3V. An external resistive divider is required for higher output voltages.
(*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die.
2/13